Cameralink FMC Module (LPC)

For machine vision applications we need to connect industrial cameras to the zedboard. These cameras often use Camera Link interfaces. Therefore we develop a FMC Module (LPC) with a Camera Link interface for the zedboard. Currently only the base configuration is supported. The second Camera Link connector on the board is a pusher for camera simulation and used for testing.


Board_PhotoWe tested the image data receiver successfully at clock rate of 85 MHz with the pusher output and with a AViiVA® SC2 CL Color linescan camera. The camera control signals work correctly, too.

The serial interface of Camera Link was only tested with a input output test. A timing test and the full integration into the operating system will follow in October.

Most of the development were done by students in there student research projects. Substantial contribution came from Nils Lindenthal (left) and Sascha Karmann (right).


Their documentations give detailed information about the hardware, firmware and software. The final work was done by Nils Lindenthal. Documentations are only available in German.

Karmann, S.: Link to document

Lindenthal, N.:  Link to document

The layout was designed with CadSoft EAGLE PCB.

All source files can be downloaded from




Development with Zynq – Part 5 – Programmable Logic projects with Vivado

This blog series describe the selection, set-up and usage of a development environment for Zynq.

Template project with AXI Lite support

The ARM architecture provide different processor interfaces. Zynq support AHB (Advanced High-performance Bus) and AXI (Advanced eXtensible Interface Bus).

Xilinx provide AXI Lite for setting and getting parameters of  PL components. AXI Lite a reduced AXI interface.
Xilinx XPS include a nice Create or Import Peripheral (CIP) wizard. This wizard generate VDHL code for bus connections. For AXI Lite the CIP provide a register connection to read and write PL Registers from PS.

In Vivado 2013.2 the CIP Wizard was missing. Therefore I use Xilinx XPS to design a custom IP. With the newer Vivado Version it is possible to generate custom IPs under “Create and Package IP ” => “Create new AXI4 peripherial”.

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Development with Zynq – Part 6 – Eclipse Project for register access

This blog series describe the selection, set-up and usage of a development environment for Zynq.

Cross-Compiling an application

This instruction assume that the development environment discussed in Part2 and the PL logic from Part5 is used. Open Eclipse 4.3 and select “Cross GCC” under “File”=>”New”=>”C++ Project”. Use PL_Register as project name. Weiter lesen

Development with Zynq – Part 4 – Boot Linaro from SD Card

This blog series describe the selection, set-up and usage of a development environment for Zynq.

Prepare SD Card

I work with a 1GB and 4GB SD card. Both work. The SD card which was part of the zedboard package did not work for me.

Two partitions are needed on the SD Card. The first partition with the boot files formated with FAT32 and the second partition with the Linux distribution formated with ext4. The boot partition have a size from 64 MB

A adapted the script from The mksdcard package include my script and  .desktop file for start. Extract mksdcard in a folder. Make a new subfolder Boot with all files for boot partition.

  • devicetree.dtb
  • uImage

In mksdcard.desktop the SD card location have to be defined. Currently it is set to /dev/sdb. Start the script and wait until it is finished. At the latest after replug. Weiter lesen

Development with Zynq – Part 3 – Build boot files

This blog series describe the selection, set-up and usage of a development environment for Zynq.

The following instructions use the development environment described in Part 2.

I am not interested in Desktop Linux like Ubuntu support. For  Desktop Linux at least VGA support is needed. Therefore components in Programmable Logic, an adjusted Device Tree and Kernel patches are needed. Link to a good  guide under  yet-another-guide-to-running-linaro-ubuntu-desktop-on-xilinx-zynq-on-the-zedboard

Overview of needed files

For booting from SD Card following files are needed.

  • Boot.bin
    The boot file includes:

    • FSBL
      A file with the first stage boot loader
    • Bitfile
      File with code for the Program Logic
    • U-boot
      Boatloader file to load the Kernel with the device Tree
  • udev.txt
    u-boot Parameter file
  • Kernel
    uImage with the Linux kernel
  • Device Tree
    dtb file with information about hardware system. The file is needed by the kernel
  • Linux distribution
    A second partition with the Linux distribution file system

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Development with Zynq – Part 2 – Set-Up the development environment

This blog series describe the selection, set-up and usage of a development environment for Zynq.

VMware with Lubuntu 13.4

I install the development environment in a virtual machine to keep my PC clean. My PC has 6GB memory with Windows 7 installed. For the development OS i use Lubuntu because it is resource-efficient and up-to-date.
Download and install “VMWare Player 6.0.1” from
Download Lubuntu 13.04 x86 installation CD Iso file from

Virtual Machine

Create a new virtual machine in VMWare Player. Select install from iso File and select the Lubuntu iso file. Select Linux as OS and Ubuntu as version. Increase the maximum disk size to 30GB or more. Before starting the virtual machine increase the memory of the virtual machine to 3GB. Now you can start the machine.

I recommend installing the English version. After installing the German version I had big problems with Vivado and other tools. One problem was that the folder structure differs. Not all programs handle that correct. A second and bigger problem was that the German version use comma not dot for decimal point representation in strings. Vivado cannot convert these strings to float and throw an exception. Weiter lesen

Development with Zynq – Part 1 – Overview

This blog series describe the selection, set-up and usage of a development environment for Zynq.

Overview of Zynq

The Zynq-7000 Family is an Extensible Processing Platform. It is the newest try from Xilinx to interconnect a Processor System (PS) with Programmable Logic (PL) to a System-on-Chip. Zynq combine a dual core arm and a FPGA.

The first processor/FPGA concepts concentrate on the PL side. They were developed by FPGA companies and so the integration of a hard processor core was a logical development step. Without a programmed PL it was not possible to run the PS. Running an operating system requires close collaboration of software and hardware developers. Two worlds collide.

Altogether high development cost meets high unit costs. The result was not a wonder.

New concepts like Xilinx Zynq or the Altera SoCs are processor concentrated. The processor runs with minimal PL programming. Flexibility is lost, but parallel hardware and software development direct from project start is possible. Weiter lesen